With the expansion of functions and performance of semiconductor devices such as ICs (Integrated Circuits) and LSIs (Large-Scale Integrations), transistors included in the semiconductor devices have been made highly integrated and miniaturized. In the miniaturized transistors, it is important to improve the so-called “roll-off characteristics” so that threshold voltages are not fluctuated due to the manufacturing irregularity of gate lengths or the like.
It has been reported that the use of In (indium), which is heavier than B (boron) as a common dopant and less likely to be diffused, improves the roll-off characteristics of n-type MOSFET transistors (hereinafter referred also to as NMOS transistors) at channel implantation for regulating threshold voltages. On the other hand, it has also been known that the implantation of In at a dose of 1×1013 cm−2 or more into channel regions degrades the withstand pressure and/or reliability of gate insulation films. In order to suppress the degradation of the characteristics of such gate insulation films, it has been proposed that nitrogen (N2) is implanted together with In and rapid temperature rising/falling annealing at a temperature of 1000 through 1100° C. is performed as post-annealing after the implantation.
Further, with the expansion of the functions of the semiconductor devices, plural transistors different in structure are integrated together on single semiconductor chips. For example, the transistors of a core part that performs calculation processing or the like are required to operate at higher speed than the transistors of peripheral circuits such as an input/output (I/O) part. Therefore, the high-speed transistors of the core part have thinner gate insulation films and are driven with lower voltages than the transistors of the I/O part. Further, in the core part, some of the transistors are designed to have different driving voltages and/or different thicknesses of the gate insulation films. The gate insulation films of such plural transistors are required to be at least partially formed in separate processes.
Therefore, it has been desired to achieve a method for manufacturing a semiconductor device having plural transistors different in structure without degrading the reliability of gate insulation films in In-implanted regions.
Patent Document 1: Japanese Laid-open Patent Publication No. 2004-119860
Non-Patent Document 1: “A 1.5 V High Performance Mixed Signal Integration with Indium Channel for 130 nm Technology Node”
Non-Patent Document 2: “ENHANCED GOI DEGRADATION AND RELIABILITY IMPROVEMENT OF NITROGEN AND INDIUM CO-IMPLANT FOR ADVANCED DUAL-GATE OXIDE APPLICATION”
Non-Patent Document 3: “A comprehensive Study of Indium Implantation-Induced Damage in Deep Submicrometer nMOSFET: Device Characterization and Damage Assessment”